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AssigneeIntel Corporation
InventorsGabor Liktor, Karthik Vaidyanathan, Jefferson Amstutz, Atsuo Kuwahara, Michael Doyle, Travis Schluessler
Estimating the term…
Apparatus and method for speculative execution of hit and intersection shaders on programmable ray tracing architectures. For example, one embodiment of an apparatus comprises: single-instruction multiple-data (SIMD) or single-instruction multiple-thread (SIMT) execution units (EUs) to execute shaders; and ray tracing circuitry to execute a ray traversal thread, the ray tracing engine comprising: traversal/intersection circuitry, responsive to the traversal thread, to traverse a ray through an acceleration data structure comprising a plurality of hierarchically arranged nodes and to intersect the ray with a primitive contained within at least one of the nodes; and shader deferral circuitry to defer and aggregate multiple shader invocations resulting from the traversal thread until a particular triggering event is detected, wherein the multiple shaders are to be dispatched on the EUs in a single shader batch upon detection of the triggering event.
An apparatus comprising:
A method comprising:
A non-transitory computer readable medium that stores instructions, which when executed by a processor, causing the processor to perform:
Dependencies are inferred from the claim text.