Memory sub-system with a virtualized bus and internal logic to perform a machine learning operation
AssigneeMicron Technology, Inc.
InventorsAmit Gattani, Poorna Kale
Life of this patent
Estimating the term…
Abstract
A memory component includes a memory region to store a machine learning model and input data and another memory region to store host data from a host system. A controller can be coupled to the memory component and can include in-memory logic to perform a machine learning operation by applying the machine learning model to the input data to generate an output data. A bus can receive additional data from the host system and a decoder can receive the additional data from the bus and can transmit the additional data to the other memory region or the in-memory logic of the controller based on a characteristic of the additional data.
Claims20
A system comprising:
- a memory component comprising a memory region to store a machine learning model and input data, and an other memory region to store host data from a host system;
- a controller, coupled to the memory component, comprising in-memory logic to perform a machine learning operation by applying the machine learning model to the input data to generate an output data, wherein the machine learning operation is associated with a priority level corresponding to a priority level of the input data, wherein the priority level can be one of:
- a high value to indicate a high priority level or a low value to indicate a low priority level, and wherein the priority level specifies a performance requirement for the machine learning operation;
- a bus to receive additional data from the host system;
- and
- a decoder to:
- receive the additional data from the bus;
- determine a characteristic of the additional data, wherein the characteristic corresponds to a memory address specified by the additional data;
- and
- transmit the additional data to the other memory region storing the host data or the in-memory logic of the controller based on the characteristic of the additional data and the priority level associated with the machine learning operation.
A method comprising:
- receiving, via a bus that is associated with a host system and a memory sub-system, an operation from the host system;
- determining a characteristic of the operation, wherein the characteristic corresponds to a memory address specified by the operation;
- determining, based on the characteristic of the operation, by a processing device, whether the operation from the host system is associated with a memory space of a memory component to store host data from the host system at the memory sub-system or is associated with a machine learning space of the memory component to store input data for performing one or more machine learning operations, wherein each machine learning operation is associated with a priority level corresponding to a priority level of the input data, wherein the priority level can be one of:
- a high value to indicate a high priority level or a low value to indicate a low priority level, and wherein the priority level specifies a performance requirement for the machine learning operation;
- and
- providing the operation from the host system to a decoder of the memory space or to an other decoder of the machine learning space based on the determination and the priority level associated with each machine learning operation of the machine learning space.
A system comprising:
- a memory component;
- and
- a processing device, operatively coupled with the memory component, to:
- receive, via a bus that is associated with a host system, an operation from the host system;
- determine a characteristic of the operation, wherein the characteristic corresponds to a memory address specified by the operation;
- determine, based on the characteristic of the operation, whether the operation from the host system is associated with a memory space of the memory component to store host data from the host system or is associated with a machine learning space of the memory component to store input data for performing one or more machine learning operations, wherein each machine learning operation is associated with a priority level corresponding to a priority level of the input data, wherein the priority level can be one of:
- a high value to indicate a high priority level or a low value to indicate a low priority level, and wherein the priority level specifies a performance requirement for the machine learning operation;
- and
- provide the operation from the host system to a decoder of the memory space or to an other decoder of the machine learning space based on the determination and the priority level associated with each machine learning operation of the machine learning space.
Dependencies are inferred from the claim text.