High-dimensional multi-distributed importance sampling for circuit yield analysis

A system for circuit yield analysis for evaluating rare failure events occurring in an integrated circuit design, the system comprising:

• a. a processor;
• and
• b. a memory having instructions stored thereon that, when executed by the processor, cause the processor to:
• I. for a plurality of variables, generate initial sampling sets by sampling from distributions, which are based on provided distributions, related to physical properties of the integrated circuits;
• II. selecting at least one sample from each initial sampling set randomly and combining the selected samples into an initial simulation set;
• III. performing an initial simulation of an operation of the integrated circuit, applying the initial simulation set, wherein the operation has a criterion for passing and failing the operation;
• IV. if the initial simulation fails:
• storing the samples of the initial simulation set into initial sampling distributions for each variable;
• V. repeating steps II-IV, a first number of times;
• VI. building importance sampling distributions based on each initial sampling distribution, wherein the importance sampling distribution comprises a mixture distribution having three sub-distributions corresponding to a lower portion, a center portion and an upper portion, wherein the three sub-distributions of the importance sampling distribution are transformations of the provided distribution according to a function of the initial sampling distribution for each variable, wherein the transformation of the provided distribution for generation of the importance sampling distribution are given by weighing portions of the initial sampling distribution for each variable;
• VII. generating a secondary simulation set by drawing a number of samples from the importance sampling distribution for each variable;
• VIII. simulating the integrated circuit by applying the secondary simulation set;
• IX. repeating steps VII-VIII, a second number of times;
• X. mapping of the resulting yields to the provided distributions, thereby obtaining a yield of the integrated circuit.