Address verification for direct memory access requests

An apparatus comprising:

• a memory;
• a processor executing instructions stored in the memory to:
• generate a direct memory access (DMA) range of addresses based on an identifier (ID) of a device, wherein the device is a bus mastering (BM) device and the ID uniquely identifies the device, wherein the BM device is a trusted device, and wherein the BM device is to:
• update the DMA range of addresses stored in a root port device;
• and
• the root port device to:
• receive a DMA request wherein the DMA request includes an address;
• and
• process the DMA request responsive to verifying that the address is in the DMA range of addresses stored in the root port device.

A non-transitory machine-readable medium storing instructions executable by a processing resource to:

• receive a direct memory access (DMA) request from a driver of bus mastering (BM) device, wherein:
• the BM device is a trusted device;
• the DMA request includes an identifier (ID) of the BM device and an address of a memory resource;
• and
• the ID uniquely identifies the BM device;
• retrieve a range of addresses of the memory resource from a plurality of registers of a root proxy device;
• determine whether the address is in the range of addresses using the ID of the BM device;
• responsive to a determination that the address is not in the range of addresses, request an updated range of addresses from an operating system (OS);
• and
• responsive to verifying that the address is in the range of addresses, process the DMA request.