Reflective mask and method for manufacturing a semiconductor device using the same

A reflective mask, comprising:

• a central region;
• an out-of-band region surrounding the central region, the out-of-band region including:
• a first inner sidewall and a second inner sidewall extending in a first direction along opposite sides of the central region, respectively, and
• a third inner sidewall and a fourth inner sidewall extending in a second direction along opposite sides of the central region, respectively;
• a first expansion region on the first inner sidewall;
• a second expansion region on the second inner sidewall;
• a first outer auxiliary region on the second inner sidewall;
• and
• a second outer auxiliary region on the first inner sidewall,
• wherein each of the first and second expansion regions is an expanded region of the out-of-band region,
• wherein each of the first and second outer auxiliary regions is configured to transfer an auxiliary pattern in a scribe line region of a substrate,
• wherein the first expansion region and the first outer auxiliary region are symmetrical with respect to a first center line extending in the first direction and passing through a center of the central region, and
• wherein the second expansion region and the second outer auxiliary region are symmetrical with respect to the first center line.

A method for manufacturing a semiconductor device, the method comprising:

• performing an extreme ultraviolet (EUV) lithography process on a substrate, the substrate including a first chip region, a second chip region, and a scribe line region between the first and second chip regions,
• wherein performing the EUV lithography process includes:
• performing a first exposure on the first chip region and the scribe line region of the substrate, such that a first exposure region on the substrate is exposed and a first blocking region on the substrate is not exposed, the first exposure region overlapping with a first region of the scribe line region, and the first blocking region overlapping with a second region of the scribe line region, and
• performing a second exposure on the scribe line region and the second chip region of the substrate, such that a second exposure region on the substrate is exposed and a second blocking region on the substrate is not exposed, the second exposure region overlapping with the second region of the scribe line region, and the second blocking region overlapping with the first region of the scribe line region.