Integrated circuit including asymmetric power line and method of designing the same

An integrated circuit comprising:

• a first cell that is arranged on a first row, wherein the first row extends in a first direction and has a first height;
• a second cell that is arranged on a second row, wherein the second row is adjacent to the first row and has the first height;
• a third cell that is arranged on a third row, wherein the third row is adjacent to the second row and has a second height;
• a first power line arranged on a first boundary where the first row and the second row contact each other, wherein the first power line is configured to provide power to the first cell and the second cell;
• and
• a second power line arranged on a second boundary where the second row and the third row contact each other, wherein the second power line is configured to provide power to the second cell and the third cell,
• wherein the first power line is symmetric based on the first boundary, and
• wherein the second power line is asymmetric based on the second boundary.

A method of designing an integrated circuit, the method comprising:

• arranging a plurality of first cells from a cell library on a plurality of first rows based on input data of defining the integrated circuit, wherein the plurality of first rows extend in a first direction and have a first height;
• arranging a plurality of second cells from the cell library on a plurality of second rows based on the input data, wherein the plurality of second rows extend in the first direction and have a second height;
• arranging a first power line having an asymmetric width with respect to a first boundary between the plurality of first rows and the plurality of second rows;
• and
• generating output data defining a layout of the integrated circuit.