US 11,755,236 B2Granted

Memory system

AssigneeKioxia Corporation

InventorsKengo Kurose, Masanobu Shirakawa, Naomi Takeda, Hideki Yamada

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Abstract

According to one embodiment, a shift register memory writes data having a first size corresponding to a capacity of a block to a plurality of layers of a plurality of data storing shift strings included in the block, in response to a first command sequence specifying a first write mode from a controller. In response to a second command sequence specifying a second write mode from the controller, the shift register memory writes data having a second size smaller than the capacity of the block to the plurality of layers of one or more first data storing shift strings of the plurality of data storing shift strings, without writing data to each of other data storing shift strings except the one or more first data storing shift strings.

Claims9

Dependent claims

A memory system comprising:

a shift register memory configured to comprise a block including a plurality of shift strings, each of the plurality of shift strings including a plurality of layers;
each of the plurality of shift strings extending in one direction, and to execute writing and reading data by a first-in last-out method or a first-in first-out method by repeating a single operation of shifting data stored in each of the layers of each of the plurality of shift strings, by a layer of the layers of each of the plurality of shift strings, in a direction along each of the plurality of shift strings;
and
a controller configured to control the shift register memory by selectively using a first write mode and a second write mode, wherein
the plurality of shift strings of the block are logically divided into a plurality of shift string groups, each of the plurality of shift string groups including one or more shift strings,
the shift resister memory is configured to:
in response to a first command sequence specifying the first write mode from the controller, write data having a first size corresponding to a capacity of the block to the plurality of layers of the plurality of shift strings by supplying a shift current to each of the plurality of shift string groups;
and
in response to a second command sequence specifying the second write mode from the controller, the second command sequence further specifying a shift string group of the plurality of shift string groups, write data having a second size smaller than the capacity of the block to the plurality of layers of one or more first shift strings included in the specified shift string group by supplying the shift current to the specified string group, without supplying the shift current to each of other shift string groups except the specified shift string group.

6 more elements

A memory system comprising:

a shift register memory configured to comprise a block including a plurality of shift strings, each of the plurality of shift strings including a plurality of layers, each of the plurality of shift strings extending in one direction, and to execute writing and reading data by a first-in last-out method or a first-in first-out method by repeating a single operation of shifting data stored in each of the layers of each of the plurality of shift strings, by a layer of the layers of each of the plurality of shift strings, in a direction along each of the plurality of shift strings;
and
a controller configured to control the shift register memory by selectively using a first write mode and a second write mode, wherein
the plurality of shift strings of the block are logically divided into a plurality of shift string groups, each of the plurality of shift string groups including one or more shift strings,
the shift resister memory is configured to:
in response to a first command sequence specifying the first write mode from the controller, write data having a first size corresponding to a capacity of the block to the plurality of layers of the plurality of shift strings by supplying a shift current to each of the plurality of shift string groups;
and
in response to a second command sequence specifying the second write mode from the controller, the second command sequence further specifying a shift string group of the plurality of shift string groups, write data having a second size smaller than a capacity of the block to a first layer group of one or more first shift strings included in the specified shift string group by supplying the shift current to the specified string group, without supplying the shift current to each of other shift string groups except the specified shift string group and not use each of other layers of the first shift strings except the first layer group,
the first layer group being a subset of the plurality of layers of the one or more first shift strings,
the first layer group including layers adjacent to each other, of the plurality of layers of each of the one or more first shift strings.

7 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/201,092Filed 15 Mar 2021
Priority: JP 2020-14478928 Aug 2020
Published: US 2022/0066688 A13 Mar 2022
Granted: 12 Sep 2023
Term ends: Not estimatedThe source records don’t support an estimate.

Classification12 codes

G06F 3/0655
Making use of a particular technique: vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more…
G06F 12/0238
Free address space management: memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
G06F 3/0604
Specifically adapted to achieve a particular effect: improving or facilitating administration, e.g. storage management
G06F 3/0679
Single storage device: non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]