Self referenced single-ended chip to chip communication

A method comprising:

• receiving, from source circuitry at destination circuitry, a first plurality of signals;
• generating a first sequence of bits based on the first plurality of signals and an average voltage level of the first plurality of signals;
• receiving, from the source circuitry at the destination circuitry, a second plurality of signals at a second point in time;
• and
• generating a second sequence of bits, with at least one value different from the first sequence of bits, based on the second plurality of signals and an average voltage level of the second plurality of signals;
• wherein the first sequence of bits and the second sequence of bits represent a same data word.

A computing system comprising:

• source circuitry configured to:
• select a first code word to represent a data word;
• convey a first plurality of signals, via a plurality of transmission lines, corresponding to the first code word;
• select a second code word to represent the data word, wherein the second code word is different from the first code word;
• and
• convey a second plurality of signals, via the plurality of transmission lines, corresponding to the second code word;
• wherein the source circuitry is configured to select at least one of the first code word and the second code word, based at least in part on an accumulative logical disparity.