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US 11,750,163 B2Granted
Deglitching circuit and method in a class-D amplifier
AssigneeSTMicroelectronics (Shenzhen) R&D Co. Ltd
InventorsRu Feng Du, Qi Yu Liu
Life of this patent
Estimating the term…
Abstract
In an embodiment, a class-D amplifier includes an input terminal configured to receive an input signal; a comparator having an input coupled to the input terminal; a deglitching circuit having an input coupled to an output of the comparator; and a driving circuit having an input coupled to an output of the deglitching circuit. The deglitching circuit includes a logic circuit coupled between the input of the deglitching circuit and the output of the deglitching circuit. The logic circuit is configured to receive a clock signal having the same frequency as the switching frequency of the class-D amplifier.
Claims20
A class-D amplifier comprising:
- a pre-amplifier circuit having an input terminal configured to receive an input signal and an output terminal configured to generate an amplified signal based on the input signal;
- an integrator having an input terminal coupled to the output terminal of the pre-amplifier circuit;
- a comparator having an input terminal coupled to an output terminal of the integrator;
- a deglitching circuit having an input terminal coupled to the output terminal of the comparator;
- and
- a driving circuit having an input terminal coupled to an output terminal of the deglitching circuit, wherein the deglitching circuits comprises:
- a first deglitching input terminal configured to receive a first signal,
- a deglitching output terminal, and
- a logic circuit coupled between the first deglitching input terminal and the deglitching output terminal, the logic circuit comprising a latch having a first logic gate and a second logic gate, an output of the first logic gate being coupled to an input of the second logic gate.
6 more elements
A class-D amplifier, comprising:
- a pre-amplifier circuit having an input terminal configured to receive an input signal and an output terminal configured to generate an amplified signal based on the input signal;
- an integrator having an input terminal coupled to the output terminal of the pre-amplifier circuit;
- a comparator having an input terminal coupled to an output terminal of the integrator;
- a deglitching circuit having an input terminal coupled to the output terminal of the comparator;
- and
- a driving circuit having an input terminal coupled to an output terminal of the deglitching circuit, wherein the deglitching circuits comprises:
- a first deglitching input terminal configured to receive a first signal,
- a deglitching output terminal, and
- a logic circuit coupled between the first deglitching input terminal and the deglitching output terminal, the logic circuit comprising a latch,
- wherein the logic circuit comprises a clock input terminal configured to receive a clock signal, and wherein the deglitching circuit is configured to produce at the deglitching output terminal a deglitching output signal having:
- a first state of the deglitching output signal when the first signal has a first state of the first signal and the clock signal has a first state of the clock signal;
- a second state of the deglitching output signal when the first signal has a second state of the first signal and the clock signal has a second state of the clock signal;
- and
- keep a previous state of the deglitching output signal when the first signal has the first state of the first signal and the clock signal has the second state of the clock signal or when the first signal has the second state of the first signal and the clock signal has the first state of the clock signal.
11 more elements
A class-D amplifier comprising:
- an input terminal configured to receive an input signal;
- an output stage configured to produce an output signal;
- an integrator having a first input coupled to the input terminal and to an output of the output stage, and a second input configured to receive a reference signal;
- a comparator having a first input coupled to an output of the integrator and a second input coupled to the second input of the integrator;
- a deglitching circuit having a first input coupled to an output of the comparator and a second input configured to receive a clock signal;
- and
- a driving circuit having an input coupled to an output of the deglitching circuit and an output coupled to an input of the output stage, wherein the deglitching circuit comprises a logic circuit coupled between the first input of the deglitching circuit and the output of the deglitching circuit, the logic circuit comprising a latch having a first logic gate and a second logic gate, an output of the first logic gate being coupled to an input of the second logic gate, the logic circuit configured to receive the clock signal, wherein the clock signal has a same frequency as a switching frequency of the class-D amplifier.
4 more elements
A class-D amplifier comprising:
- an input terminal configured to receive an input signal;
- an output stage configured to produce an output signal;
- a driving circuit having an output coupled to an input of the output stage;
- an integrator having an input coupled to the input terminal and to an output of the output stage;
- a comparator having an input coupled to an output of the integrator;
- and
- a deglitching circuit comprising:
- a first input coupled to an output of the comparator,
- a second input configured to receive a first signal,
- an output coupled to an input of the driving circuit,
- a NAND gate having a first input coupled to the first input of the deglitching circuit, and a second input coupled to the second input of the deglitching circuit,
- a NOR gate having a first input coupled to the first input of the deglitching circuit, and a second input coupled to the second input of the deglitching circuit,
- an inverter having an input coupled to an output of the NAND gate,
- a latch having a first input coupled to an output of the inverter, a second input coupled to an output of the NOR gate, and an output coupled to the output of the deglitching circuit.
11 more elements
Dependencies are inferred from the claim text.