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US 11,749,318 B2Granted
Interface protocol configuration for memory
AssigneeMicron Technology, Inc.
InventorsRichard C. Murphy, Glen E. Hush, Honglin Sun
Life of this patent
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Abstract
Apparatuses and methods can be related to configuring interface protocols for memory. An interface protocol can define the commands received by a memory device utilizing pins of an interface of a memory device. An interface protocol used by a memory device can be implemented utilizing a decoder of signals provided through the pins of the memory device. The decoder utilized by a memory device can be selected by setting a mode register of the memory device.
Claims20
A computing apparatus, comprising:
- a memory device;
- a processing resource coupled to the memory device and configured to:
- provide a first command to the memory device wherein the first command is compliant with a first standardized interface protocol of the memory device;
- provide a second command to the memory device to set a mode register of the memory device;
- provide a third command to the memory device wherein the third command is not compliant with the first interface protocol of the memory device;
- and
- provide a fourth command to the memory device to reset the mode register.
4 more elements
A memory apparatus, comprising:
- an interface comprising a plurality of pins;
- a mode register;
- a first decoder coupled to the interface, wherein the first decoder is configured to interpret binary values of a first command received via the plurality of pins in accordance with a first interface protocol responsive to the mode register being set;
- a second decoder coupled to the interface, wherein the second decoder is configured to interpret binary values of a third command received via the plurality of pins in accordance with a second interface protocol responsive to the mode register being reset;
- and
- control circuitry coupled to the first decoder, the second decoder, and the mode register, and configured to:
- receive a second command via the interface to set the mode register;
- and
- receive a fourth command to the memory device to reset the mode register.
6 more elements
A method, comprising:
- decoding a first command received from a host via a plurality of pins according to a first interface protocol based on a mode register of a memory device reflecting a first mode;
- interpreting binary values of the first command received via the plurality of pins according to the first interface protocol;
- receive a second command to set the mode register to reflect the second mode;
- decoding a third command received from the host via the plurality of pins according to the second interface protocol based on the mode register reflecting a second mode;
- interpreting binary values of the third command received via the plurality of pins according to the second interface protocol;
- and
- receiving a fourth command to reset the mode register to reflect the first mode.
4 more elements
Dependencies are inferred from the claim text.