Memory region allocation to a software program

A processor comprising:

• a decoder to decode a first instruction and a second instruction, the first instruction to allocate a memory region to a software program, the second instruction to specify a first address associated with a data object, the first address having a first memory tag;
• range rule circuitry to determine a valid range for the memory region;
• address adjustment circuitry to determine a first number of address bits to be used by the software program to manipulate the first address within the valid range and a second number of address bits to include a memory tag to indicate access permission;
• and
• encryption circuitry to encrypt at least a portion of the first address and the memory tag to generate an encrypted address to be returned to the software program;
• a cache;
• address translation circuitry to translate the first address to a second address, the second address to identify a memory location of the data object;
• a comparator to compare the first memory tag and a second memory tag associated with the second address;
• a cache controller to detect a cache miss associated with the memory location;
• and
• a memory controller to, in response to the comparator detecting a match between the first memory tag and the second memory tag and the cache controller detecting the cache miss, load the data object from the memory location into the cache.