Method for optimized filling hole and manufacturing fine line on printed circuit board
AssigneesTriallian Corporation, Albert Yeh
InventorsAlbert Yeh, Nick Yang
Life of this patent
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Abstract
A method for optimized filling holes and manufacturing fine lines on a printed circuit board (PCB) carries out the two processes separately. The inner wall of the hole is metalized with reduced graphene oxide (rGO) and then electroplated to fill the hole with copper. The processes are individually performed and thus operating parameters are considered independently. As a result, the copper-plating fillings are evenly compact and the fine lines have square profiles.
Claims11
A method for optimized filling holes on a printed circuit board, comprising steps of:
- (a) providing a copper clad substrate including a prepreg layer overlaid with a copper foil and a first dry film laminated on the copper foil, in which a blind hole with an insulative inner wall is formed at a predetermined position and defines an upper opening, wherein the first dry film is patterned corresponding to the upper opening and insoluble in a non-alkaline solution;
- (b) modifying the insulative inner wall of the blind hole with reduced graphene oxide (rGO);
- (c) depositing copper in the blind hole through an electroplating process to form a copper-plating hole;
- (d) removing the first dry film to expose the copper foil;
- (e1) laminating and patterning a second dry film on the substrate by covering areas of fine lines and the copper-plating hole;
- (e2) removing portions of the copper foil that are not masked by the second dry film;
- and
- (e3) removing the second dry film.
A method for optimized filling holes and manufacturing fine lines on a printed circuit board, comprising steps of:
- (a1) providing a copper clad substrate overlaid with a copper foil and drilling a hole at a predetermined position, wherein the hole has an upper opening with an insulative inner wall;
- (a2) laminating a second dry film on the copper foil and forming a circuit pattern corresponding to designed fine lines;
- (a3) depositing copper in the circuit pattern through an electroplating process;
- (a4) removing the second dry film;
- (a5) laminating a first dry film on the copper foil and patterning the first dry film corresponding to the upper opening to form a blind hole, wherein the first dry film is insoluble in a non-alkaline solution;
- (b) modifying the insulative inner wall of the blind hole with reduced graphene oxide (rGO);
- (c) depositing copper in the blind hole through an electroplating process;
- (d) removing the first dry film;
- and
- (e) removing exposed copper foil.
Dependencies are inferred from the claim text.