Wafer structure
AssigneeMicrojet Technology Co., Ltd.
InventorsHao-Jan Mou, Ying-Lun Chang, Hsien-Chung Tai, Yung-Lung Han, Chi-Feng Huang, Chun-Yi Kuo
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AssigneeMicrojet Technology Co., Ltd.
InventorsHao-Jan Mou, Ying-Lun Chang, Hsien-Chung Tai, Yung-Lung Han, Chi-Feng Huang, Chun-Yi Kuo
Estimating the term…
A wafer structure is disclosed and includes a chip substrate and a plurality of inkjet chips. The chip substrate is a silicon substrate fabricated by a semiconductor process on a wafer of at least 12 inches. The inkjet chips include at least one first inkjet chip and at least one second inkjet chip directly formed on the chip substrate by the semiconductor process, respectively, and the plurality of inkjet chips are diced into the at least one first inkjet chip and the at least one second inkjet chip for inkjet printing. Each of the first inkjet chip and the second inkjet chip includes a plurality of ink-drop generators produced by a semiconductor process and formed on the chip substrate. Each of the ink-drop generators includes a thermal-barrier layer, a resistance heating layer, a conductive layer, a protective layer, a barrier layer, an ink-supply chamber and a nozzle.
A wafer structure, comprising:
Dependencies are inferred from the claim text.