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US 11,720,785 B2Granted
Analog to digital converter using memristors in a neural network
AssigneeTechnion Research & Development Foundation Limited
InventorsLoai Danial, Shahar Kvatinsky
Life of this patent
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Abstract
An analog to digital converter comprises an input for receiving an analog input signal; a plurality of outputs for outputting parallel bits of a digital signal that represents said analog input signal; and a neural network layer providing connections between each of said outputs respectively, each connection having an adjustable weighting. The synapses of the neural networks may be memristors and training may use online gradient descent.
Claims16
An analog to digital converter comprising:
- an input for receiving an analog input signal;
- a plurality of outputs for outputting parallel bits of a digital signal that represents said analog input signal;
- and
- a trainable neural network layer, the neural network layer comprising connections between each of said outputs respectively, each connection having a weighting, the weighting being adjustable for training, wherein said connections comprise adaptable synapses respectively to provide said adjustable weightings, and wherein each adaptable synapse is set with a respective weighting and each output bit is a comparison result from a weighted sum of said plurality of output bits.
1 more element
An analog to digital conversion method comprising:
- receiving an analog input signal;
- outputting parallel bits of a digital signal that represents said analog input signal at outputs;
- providing connections between each of said outputs respectively;
- and
- providing an adjustable weighting to each connection, thereby to provide a trainable neural network connecting said outputs, wherein said connections form a neural network and said providing an adjustable weighting comprises adapting a synapse of said neural network, the method further comprising setting each adaptable synapse weighting respectively such that each output bit is a comparison result from a weighted sum of said plurality of output bits.
2 more elements
Dependencies are inferred from the claim text.