Nonvolatile memory device including a fast read page and a storage device including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsYunjung Lee, Chanha Kim, Kangho Roh, Heewon Lee
Life of this patent
Estimating the term…
Abstract
A nonvolatile memory device including: a memory cell array, the memory cell array including a plurality of cell strings, at least one of the cell strings including a plurality of memory cells stacked in a direction perpendicular to a surface of a substrate, at least one of the memory cells is a multi-level cell storing at least three bits; and a control logic circuit configured to control a page buffer to read a fast read page of the memory cells with one read voltage and at least two normal read pages of the memory cells with the same number of read voltages.
Claims20
A storage device comprising:
- a nonvolatile memory including a page buffer and a memory cell array that includes a plurality of memory blocks, each of the plurality of memory blocks including a plurality of memory cells, the page buffer being configured to receive and/or read data in a unit of page;
- and
- a controller configured to perform a read operation on the nonvolatile memory,
- wherein pages of the plurality of memory cells include a first read page and a second read page,
- the first read page is a page in which data are determined by only one read voltage, and
- the second read page is a page in which data are determined by two or more read voltages.
A storage device comprising:
- a nonvolatile memory including a page buffer and a memory cell array that includes a plurality of memory blocks, each of the plurality of memory blocks including a plurality of memory cells, the page buffer being configured to receive and/or read data in a unit of page;
- and
- a controller configured to perform a read operation on the nonvolatile memory,
- wherein pages of the plurality of memory cells include a first read page and a second read page,
- the first read page is a page in which data are determined by n read voltages, n being a positive integer,
- the second read page is a page in which data are determined by m read voltages, m being a positive integer that is different from n, and
- each of the plurality of memory cells is a multi-level cell configured to store at least three bits.
A storage device comprising:
- a nonvolatile memory including a memory cell array that includes a plurality of memory blocks, each of the plurality of memory blocks including a plurality of memory cells, each of the plurality of memory blocks including the plurality of a plurality of cell strings formed in a direction perpendicular to a substrate and a page buffer, each of the plurality of cell strings including at least one string selection transistor, serially-connected memory cells, and at least one ground selection transistor, and the page buffer being configured to read data in a unit of page;
- and
- a controller configured to perform a read operation on the nonvolatile memory,
- wherein pages of the plurality of memory cells include a first read page and a second read page,
- the first read page is a page in which data are determined by only one read voltage, and
- the second read page is a page in which data are determined by two or more read voltages.
Dependencies are inferred from the claim text.