Integrated mixed-signal ASIC with ADC, DAC, and DSP
AssigneeSeakr Engineering, Inc.
InventorsPaul Rutt, Erik Buehler, Damon Van Buren
Life of this patent
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Abstract
An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuitry is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.
Claims20
A mixed-signal radio frequency (RF) transceiver for a satellite, the RF transceiver being contained on one or more die, all located on a same semiconductor package, the RF transceiver comprising:
- a plurality of analog to digital conversion (ADC) units, each configured for conversion of a first RF signal to a sampled digital signal;
- a plurality of digital to analog conversion (DAC) units, each configured for conversion of processed digital data to a second RF signal;
- a first plurality of digital inputs coupled to one or more reconfigurable digital signal processing (DSP) cores;
- a second plurality of digital inputs coupled to the plurality of DAC units;
- a first plurality of digital outputs coupled to the one or more reconfigurable DSP cores;
- and
- a second plurality of digital outputs coupled to the plurality of ADC units;
- wherein the one or more reconfigurable DSP cores are configured to process data from the second plurality of digital outputs and the one or more reconfigurable DSP cores are configured to output the processed digital data to the second plurality of digital inputs;
- and
- wherein the RF transceiver is configured to selectively cause portions of the RF transceiver to become non-operational, the selectively non-operational portions selected from the group comprising the plurality of ADC units, the plurality of DAC units, the first plurality of digital inputs, the second plurality of digital inputs, the first plurality of digital outputs, the second plurality of digital outputs, and the one or more reconfigurable DSP cores.
A method for operating a mixed-signal radio frequency (RF) transceiver for a satellite, the RF transceiver being contained on one or more die, all located on a same semiconductor package, wherein:
- the RF transceiver comprises:
- one or more analog to digital conversion (ADC) units;
- one or more digital to analog conversion (DAC) units;
- a first plurality of digital inputs coupled to one or more reconfigurable digital signal processing (DSP) cores;
- a second plurality of digital inputs coupled to the plurality of DAC units;
- a first plurality of digital outputs coupled to the one or more reconfigurable DSP cores;
- and
- a second plurality of digital outputs coupled to the plurality of ADC units;
- the method comprising:
- selectively causing portions of the RF transceiver to become non-operational, the selectively non-operational portions selected from the group comprising the one or more ADC units, the one or more DAC units, the first plurality of digital inputs, the second plurality of digital inputs, the first plurality of digital outputs, the second plurality of digital outputs, and the one or more reconfigurable DSP cores;
- in response to causing an ADC unit of the one or more ADC units to be operational, converting, by an operating ADC unit of the one or more ADC units, a first RF signal to a sampled digital signal;
- in response to causing a DAC unit of the one or more DAC units to be operational, converting, by an operating DAC unit of the one or more DAC units, processed digital data to a second RF signal;
- and
- in response to causing a reconfigurable DSP core of the one or more reconfigurable DSP cores to be operational:
- processing, by an operating reconfigurable DSP core of the one or more reconfigurable DSP cores, data from the second plurality of digital outputs;
- and
- outputting, by an operating reconfigurable DSP core of the one or more reconfigurable DSP cores, the processed digital data to the second plurality of digital inputs.
Dependencies are inferred from the claim text.