Integrated bus interface fall and rise time accelerator method

An integrated circuit (IC), comprising:

• a first bus terminal;
• a second bus terminal;
• a pass-gate transistor coupled between the first and second bus terminals;
• a first rising time accelerator (RTA) control circuit coupled to the first bus terminal, the first RTA control circuit configured to detect a rising edge of a first signal on the first bus terminal and, in response, to accelerate a voltage increase of the first signal on the first bus terminal;
• a first falling edge accelerator (FTA) control circuit coupled to the first bus terminal, the first FTA control circuit configured to detect a falling edge of the first signal on the first bus terminal having a voltage slope below a threshold and, in response, to accelerate a voltage decrease of the first signal on the first bus terminal;
• a second RTA control circuit coupled to the second bus terminal, the second RTA control circuit configured to detect a rising edge of a second signal on the second bus terminal and, in response, to accelerate a voltage increase of the second signal on the second bus terminal;
• a second FTA control circuit couple to the second bus terminal, the second FTA control circuit configured to detect a falling edge of the second signal on the second bus terminal having a voltage slope below the threshold and, in response, to accelerate a voltage decrease of the second signal on the second bus terminal.

An integrated circuit (IC), comprising:

• a first terminal;
• a driver having a driver input and a driver output, the driver output coupled to the first terminal;
• a first control circuit having an input coupled to the first terminal and having an output, the first control circuit configured to:
• (a) during a rising edge, detect that a voltage on the first terminal has risen above a first threshold and to assert a control signal on its output to cause the driver to accelerate a rise in the voltage, and (b) during a falling edge, detect that the voltage on the first terminal is below a second threshold, second threshold smaller than the first threshold;
• a first transistor coupled between the first terminal and a ground, the first transistor having a control input;
• and
• a second control circuit coupled to the first terminal and to the control input of the first transistor, the second control circuit configured to detect a falling edge on the first terminal and, in response to detecting the falling edge, to generate a control signal for the control input to turn on the first transistor to force a voltage on the first terminal to decrease at a faster rate than the detected falling edge.