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US 11,710,687 B2Granted
Semiconductor package with guide pin
AssigneeSemiconductor Components Industries, LLC
InventorsChee Hiong Chew, Yushuang Yao, Atapol Prajuckamol, Chuncao Niu
Life of this patent
Estimating the term…
Abstract
A semiconductor guide pin is disclosed. Specific implementations may include a heatsink, one or more substrates coupled together, one or more pressfit pins coupled to the one or more substrates, and two or more guide pins coupled to the one or more substrates, where the two or more guide pins may have a height greater than the one or more pressfit pins.
Claims18
A semiconductor package, comprising:
- one or more substrates coupled together;
- one or more pressfit pins coupled to the one or more substrates;
- and
- two or more guide pins coupled directly on a first side of the one or more substrates;
- wherein the two or more guide pins have a height greater than the one or more pressfit pins.
2 more elements
A semiconductor package, comprising:
- one or more substrates coupled together;
- one or more pressfit pins coupled to the one or more substrates;
- and
- two or more guide pins directly coupled to the one or more substrates;
- wherein the two or more guide pins are configured to align the one or more pressfit pins with corresponding openings in a printed circuit board.
2 more elements
A semiconductor guide pin, comprising:
- a first portion coupled with a stress relief portion, the stress relief portion configured to be coupled to a substrate or a heatsink;
- wherein the first portion is configured to extend into an opening in a printed circuit board to align a plurality of pressfit pins with a plurality of openings in the printed circuit board;
- and
- wherein the guide pin is configured to be electrically isolated when coupled to the substrate.
1 more element
Dependencies are inferred from the claim text.