Variable resistance memory device

A variable resistance memory device, comprising:

• a substrate;
• horizontal structures and variable resistance patterns alternately stacked on the substrate in a first direction perpendicular to a top surface of the substrate;
• and
• a selection line extending lengthwise in the first direction and connected to the horizontal structures,
• wherein:
• each of the horizontal structures includes a first electrode pattern, a semiconductor pattern, and a second electrode pattern arranged in a second direction parallel to the top surface of the substrate,
• each of the variable resistance patterns is connected to a corresponding one the second electrode patterns, and
• the selection line is connected to the semiconductor pattern of each of the horizontal structures.

A variable resistance memory device, comprising:

• a substrate;
• horizontal structures laterally spaced apart from each other on a top surface of the substrate;
• a vertical insulating pattern between the horizontal structures and extending lengthwise in a first direction perpendicular to the top surface of the substrate;
• variable resistance patterns on the horizontal structures, respectively;
• and
• a conductive line connected to the variable resistance patterns,
• wherein:
• each of the horizontal structures includes a first electrode pattern, a semiconductor pattern, and a second electrode pattern arranged along a second direction parallel to the top surface of the substrate,
• each of the variable resistance patterns is on the second electrode pattern of a corresponding one of the horizontal structures,
• the horizontal structures are spaced apart from each other in a third direction parallel to the top surface of the substrate and intersecting the second direction, and
• the conductive line extends lengthwise in the third direction and is connected to the variable resistance patterns.