Three-dimensional memory devices and fabrication methods thereof

A three-dimensional (3D) memory device, comprising:

• a structure of a plurality of gate electrodes insulated by a sealing structure over a substrate;
• and
• a semiconductor channel structure extending from a top surface of the structure of the plurality of gate electrodes to the substrate, the semiconductor channel structure comprising a plurality of sub-memory portions,
• wherein
• each one of the plurality of sub-memory portions extends along a first direction in which the semiconductor channel structure extends;
• each one of the plurality of sub-memory portions is partially surrounded by a respective one of the gate electrodes;
• the plurality of sub-memory portions are disconnected from one another by a plurality of recessed areas each extending along a second direction perpendicular to the first direction in which the semiconductor channel structure extends, each one of the plurality of sub-memory portions comprising a surface formed in a corresponding recessed area and extending along the second direction in a plan view;
• and
• the sealing structure fills into the recessed areas and covers the surface of each one of the plurality of sub-memory portions.