Method for manufacturing semiconductor memory device

A method of manufacturing a semiconductor memory device, comprising:

• receiving a silicon substrate including a cell area and a peripheral area;
• forming a first bit line structure on a surface of the cell area, wherein the first bit line structure sequentially comprises a bit line contact disposed on the surface of the cell area, a tungsten layer disposed on the bit line contact, and a nitride layer disposed on the tungsten layer, the first bit line structure has a top surface away from the substrate and two sidewalls connecting the top surface to the substrate, and the first bit line structure is sandwiched by a pair of spacers, wherein each spacer comprises a spacer oxide layer sandwiched by two spacer nitride layers, and wherein a barrier layer conformally overlays the spacers adjacent to the sidewalls of the first bit line structure and the cell area;
• performing an atomic layer deposition (ALD) to deposit a landing pad above the barrier layer and on the top surface of the first bit line structure;
• performing a directional etching to remove a top corner of the landing pad to form a concave surface with a top opening of the spacer formed in the concave surface;
• performing an anisotropic dry etch process to etch the nitride layer of the first bit line structure and the spacer nitride layer from the top opening so as to form a concavity;
• etching the spacer oxide layer from the concavity to form an air gap;
• and
• depositing a silicon nitride layer to seal the air gap.