US 11,706,851 B2 · RF circuit and enclosure having a micromachined interior using semiconductor fabrication

Abstract

An exemplary semiconductor technology implemented microwave filter includes a dielectric substrate with metal traces on one surface that function as frequency selective circuits and reference ground. A top enclosure encloses the substrate have respective interior recesses with deposited continuous metal coatings. A plurality of metal bonding bumps or bonding wall extends outwardly from the projecting walls of the bottom and top enclosures. The bonding bumps on the top enclosure engage reference ground metal traces on respective surface of the substrate. As a result of applied pressure, the bonding bumps and respective reference ground metal traces together with the through-substrate vias form a metal-to-metal singly-connected ground reference structure for the entire circuitry.

Claims18

Dependent claims

A semiconductor technology implemented circuit comprising:

a substantially planar dielectric substrate;
metal traces disposed on at least one of two major surfaces of the substrate that function as frequency selective circuits and a reference ground;
other metal traces disposed on at least one of the two major surfaces of the substrate that function as the reference ground;
frequency selective RF circuitry disposed on the dielectric substrate;
a semiconductor technology implemented top enclosure with at least one interior recess and outwardly extending peripheral walls that include a substantially first planar end area that is parallel to the substrate, the substantially first planar end area aligned with metal traces on the one major surface of the substrate that function as the electrical ground, all interior surfaces of the top enclosure including the substantially planar end area of the top enclosure and the at least one interior recess having a deposited metal coating;
and
a conductive bonding agent engaging the first substantially planar end area and the aligned metal traces on the one major surface, the conductive bonding agent forming conductive bonds to establish a common reference ground between the deposited metal coating of the top enclosure and the other metal traces;
the at least one interior recess dimensioned to enclose the frequency selective RF circuitry to provide electromagnetic shielding for the frequency selective RF circuitry.

5 more elements

A semiconductor technology implemented enclosure for providing electromagnetic shielding of frequency selective RF circuitry disposed on a substantially planar dielectric substrate with metal traces disposed on at least one major surface of the substrate that function as a reference ground, the enclosure comprising:

a dielectric wafer having a micromachined semiconductor fabricated interior;
recesses in the interior are defined between outwardly extending peripheral walls on the interior, the peripheral walls have substantially planar end areas that are parallel to each other and are in the same plane, the recesses are dimensioned to surround and provide electromagnetic isolation for the respective frequency selective RF circuitry when the planar end areas of enclosure engage the one major surface of the substrate;
a conductive metal coating deposited on all interior surfaces of the enclosure including the substantially planar end areas and the recesses;
the substantially planar end areas are dimensioned to engage the metal traces on the one major surface of the substrate so that, when engaged, the interior recesses form part of the reference ground.

1 more element

A method for manufacturing enclosures for a semiconductor technology implemented microwave and millimeter wave frequency filter having frequency selective circuitry disposed on a substrate that contains reference ground metal traces, the enclosure enclosing the frequency selective circuitry, the method comprising the steps of:

applying a pattern of photoresist where the pattern covers areas that define where walls will extend from the enclosure;
etching away a layer of the silicon wafer except for the areas with the photoresist that define the walls, the etched away layer of silicon forming at least one interior recess in the silicon wafer;
removing the pattern of photoresist;
sputtering the entirety of the exposed surface of the silicon wafer with gold so that sputtered gold coats the ends of the walls, at least one interior recess in the silicon wafer, and the interior sides of the walls;
and
plating the area covered by sputtered gold with gold.

3 more elements

Dependencies are inferred from the claim text.

RF circuit and enclosure having a micromachined interior using semiconductor fabrication

Life of this patent

RF circuit and enclosure having a micromachined interior using semiconductor fabrication

Life of this patent

Abstract

Claims18