Symbol judgement apparatus and symbol judgement method

A symbol determination device comprising:

• a provisional determiner configured to generate a symbol sequence by performing adaptive equalization by an estimation inverse transfer function of a transmission line on a reception signal sequence extracted from the transmission line, and perform provisional determination on the symbol sequence;
• a transmission estimator configured to generate, based on a plurality of the symbol sequences indicating transmission line states and an estimation transfer function of the transmission line, an estimation reception symbol sequence for each of the transmission line states;
• a sequence estimation algorithm processor configured to calculate a metric between the symbol sequence obtained from the reception signal sequence and each of a plurality of the estimation reception symbol sequences, and select a most likelihood estimation reception symbol sequence of the plurality of the estimation reception symbol sequences by a predetermined algorithm, based on the calculated metric, a provisional determination symbol provisionally determined by the provisional determiner, and nearby symbols of the provisional determination symbol;
• and
• a path tracing determiner configured to determine a transmission symbol sequence by tracing back paths of trellis, based on the most likelihood estimation reception symbol sequence,
• wherein the sequence estimation algorithm processor generates a plurality of the symbol sequences indicating the transmission line states in a range of the provisional determination symbol and the nearby symbols of the provisional determination symbol to output the plurality of the symbol sequences to the transmission line estimator,
• wherein each of the provisional determiner, the transmission line estimator, the sequence estimation algorithm processor, and the path tracing determiner is implemented by:
• i) computer executable instructions executed by at least one processor,
• ii) at least one circuitry or
• iii) a combination of computer executable instructions executed by at least one processor and at least one circuitry.