Devices, systems, and methods for serial communication over a galvanically isolated channel

A device for galvanic isolation, the device comprising:

• a first integrated circuit (IC) device interface;
• first input/output components connected to the first IC device interface;
• a second IC device interface;
• second input/output components connected to the second IC device interface;
• an insulator layer having a first major surface and a second major surface;
• at least one pair of conductive elements and corresponding interconnection paths on the first major surface, wherein the interconnection paths are electrically connected to the first IC device interface by plate-specific vias;
• and
• at least one pair of conductive elements and corresponding interconnection paths on the second major surface, wherein the interconnection paths are electrically connected to the second IC device interface by plate-specific vias;
• wherein the at least one pair of conductive elements on the first major surface of the insulator layer are aligned with the at least one pair of conductive elements on the second major surface of the insulator layer to form at least one pair of couplers.

A system for serial communication, the system comprising:

• a galvanic isolation device;
• a first integrated circuit (IC) device connected to the galvanic isolation device;
• and
• a second IC device connected to the galvanic isolation device;
• wherein the galvanic isolation device includes;
• first input/output components connected to the first IC device;
• second input/output components connected to the second IC device;
• an insulator layer having a first major surface and a second major surface;
• at least one pair of conductive elements and corresponding interconnection paths on the first major surface, wherein the interconnection paths are electrically connected to the first IC device by plate-specific vias;
• and
• at least one pair of conductive elements and corresponding interconnection paths on the second major surface, wherein the interconnection paths are electrically connected to the second IC device by plate-specific vias;
• wherein the at least one pair of conductive elements on the first major surface of the insulator layer are aligned with the at least one pair of conductive elements on the second major surface of the insulator layer to form at least one pair of couplers.