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US 11,706,014 B1Granted
Clock synchronization loop
AssigneeMellanox Technologies, Ltd.
InventorsNatan Manevich, Dotan David Levi, Wojciech Wasko, Ariel Almog, Bar Shapira
Life of this patent
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Abstract
In one embodiment, a synchronized communication system includes a plurality of compute nodes, and clock connections to connect the compute nodes in a closed loop configuration, wherein the compute nodes are configured to distribute among the compute nodes a master clock frequency from any selected one of the compute nodes.
Claims26
A synchronized communication system, comprising:
- a plurality of compute nodes including a first compute node, one or more intermediate compute nodes, and a last compute node;
- and
- clock connections to connect the compute nodes in a closed loop configuration, wherein:
- each of the compute nodes has an output connected to an input of a next one of the compute nodes via a respective one of the clock connections, while the last compute node has an output connected to an input of the first compute node via another respective one of the clock connections;
- the compute nodes are configured to distribute among the compute nodes, via ones of the clock connections, a master clock frequency from any selected one of the compute nodes, which is designated as a master clock;
- at a first time one of the plurality of compute nodes is designated as the master clock and is configured to distribute the master clock frequency among the compute nodes;
- and
- at a second time another one of the plurality of compute nodes is designated as the master clock, and is configured to distribute the master clock frequency among the compute nodes.
5 more elements
A synchronized communication method, comprising:
- connecting compute nodes including a first compute node, one or more intermediate compute nodes, and a last compute node, with clock connections in a closed loop configuration so that each of the compute nodes has an output connected to an input of a next one of the compute nodes via a respective one of the clock connections, while the last compute node has an output connected to an input of the first compute node via another respective one of the clock connections;
- distributing among the compute nodes, via ones of the clock connections, a master clock frequency from any selected one of the compute nodes, which is designated as a master clock;
- at a first time, designating one of the plurality of compute nodes as the master clock and distributing the master clock frequency among the compute nodes;
- and
- at a second time, designating another one of the plurality of compute nodes as the master clock, and distributing the master clock frequency among the compute nodes.
2 more elements
Dependencies are inferred from the claim text.