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US 11,705,173 B1Granted
Address bits with reduced hamming distance
AssigneeMicron Technology, Inc.
InventorsLeon Zlotnik, Leonid Minz
Life of this patent
Estimating the term…
Abstract
Memory units are accessed using address bits. The address bits used to access memory units can have various formats. The address bits to access successive locations that are to be sequentially accessed can have a reduced Hamming distance binary code format to reduce a quantity of toggling to switch from one set of address bits to another set of address bits.
Claims18
An apparatus, comprising:
- a memory unit;
- and
- a controller coupled to the memory unit, the controller configured to:
- convert a sets of physical address bits having a natural binary code format to a reduced Hamming distance binary code format;
- access a first portion of the memory unit using a first set of physical address bits having the natural binary code format;
- and
- access a second portion of the memory unit using a second set of physical address bits having the reduced Hamming distance binary code format, wherein the reduced Hamming distance binary code format involves a reduced number of toggles in accessing the memory unit than using the natural binary code format.
4 more elements
An apparatus, comprising:
- a memory unit;
- and
- a controller coupled to the memory unit, the controller configured to:
- convert, to access a first group of memory cells of the memory unit and having respective physical addresses of successive numerical values, a format of sets of address bits corresponding to the respective physical addresses from a natural binary code format to a reduced Hamming distance binary code format;
- access the first group of memory cells of the memory unit using the address bits having the converted format;
- and
- access a second group of memory cells of the memory unit using a second set of physical address bits having the natural binary code format.
4 more elements
A method, comprising:
- converting, to access a first group of memory cells of a memory unit having respective physical addresses of successive numerical values, a format of sets of address bits corresponding to the respective physical addresses from a natural binary code format to a reduced Hamming distance binary code format;
- accessing the first group of memory cells using the sets of address bits having the reduced Hamming distance binary code format;
- and
- accessing a second portion of the memory unit using different sets of physical address bits having the natural binary code format.
1 more element
Dependencies are inferred from the claim text.