Stackable via package and method
AssigneeAmkor Technology Singapore Holding Pte. Ltd.
InventorsAkito Yoshida, Mahmoud Dreiza, Curtis Michael Zwenger
Life of this patent
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Abstract
A stackable via package includes a substrate having an upper surface and a trace on the upper surface, the trace including a terminal. A solder ball is on the terminal. The solder ball has a solder ball diameter A and a solder ball height D. A via aperture is formed in a package body enclosing the solder ball to expose the solder ball. The via aperture includes a via bottom having a via bottom diameter B and a via bottom height C from the upper surface of the substrate, where A<B and 0=<C<1/2×D. The shape of the via aperture prevents solder deformation of the solder column formed from the solder ball as well as prevents solder bridging between adjacent solder columns.
Claims22
An electronic package comprising:
- a substrate comprising a first substrate side facing a first vertical direction;
- a terminal on the first substrate side;
- a package interconnect on the terminal;
- and
- a package body on the first substrate side and laterally surrounding the package interconnect,
- wherein:
- the package body comprises an aperture in which at least a portion of the package interconnect is positioned, the aperture being defined by an interior sidewall of the package body;
- and
- in a vertical cross-section, the interior sidewall comprises:
- a first sidewall portion that contacts the package interconnect and comprises a non-zero concave curvature;
- and
- a second sidewall portion that does not contact the package interconnect and is more horizontal than the first sidewall portion.
A method of forming an electronic package, the method comprising:
- providing a first structure comprising:
- a substrate comprising a first substrate side facing a first vertical direction;
- a terminal on the first substrate side;
- and
- a package interconnect on the terminal;
- and
- forming a package body on the first substrate side and laterally surrounding the package interconnect,
- wherein:
- the package body comprises an aperture in which at least a portion of the package interconnect is positioned, the aperture being defined by an interior sidewall of the package body;
- and
- in a vertical cross-section, the interior sidewall comprises:
- a first sidewall portion that contacts the package interconnect and comprises a non-zero curvature, the first sidewall portion defining a first portion of the aperture having a first maximum width;
- and
- a second sidewall portion that does not contact the package interconnect, the second sidewall portion directly vertically adjacent the first sidewall portion, the second sidewall portion defining a second portion of the aperture having a second maximum width that is greater than the first maximum width.
The method of claim of 9, wherein said forming the package body comprises, after said molding the encapsulating material, expanding the aperture.
A method of manufacturing an electronic device, the method comprising:
- providing a first structure comprising:
- a substrate comprising a first substrate side facing a first vertical direction;
- a first interconnection structure coupled to the first substrate side, the first interconnection structure comprising a first solder;
- and
- an encapsulating material on the first substrate side and laterally surrounding the first solder, the encapsulating material comprising a first encapsulation side facing the first vertical direction, and a second encapsulation side facing the substrate,
- where the first solder is entirely confined to an aperture;
- enlarging the aperture around the first interconnection structure;
- and
- after said enlarging the aperture, coupling a second solder to the first solder.
Dependencies are inferred from the claim text.