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US 11,700,464 B2Granted
Selective nitrided gate-oxide for RTS noise and white-pixel reduction
AssigneeOmniVision Technologies, Inc.
InventorSeong Yeol Mun
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Abstract
A pixel cell includes a nitrogen-implanted region at a semiconductor material-gate oxide proximate interface located in a region above a photodiode. The pixel cell is further devoid of implanted nitrogen in channel regions of a plurality of pixel transistors. Thus, Si—N bonds are formed at the semiconductor material-gate oxide interface in the region above the photodiode, while the channel regions are protected from nitrogen implantation at the semiconductor material-gate oxide interface. Methods of forming the pixel cell are also described.
Claims21
A pixel cell, comprising:
- a photodiode, a floating diffusion, and a plurality of doped regions of a plurality of pixel transistors of the pixel disposed in a layer of semiconductor material;
- a gate oxide layer disposed over the layer of semiconductor material, the gate oxide layer comprising a nitrogen-implanted region at a semiconductor material-gate oxide proximate interface at a region above the photodiode;
- a pinning layer disposed at least partially under the gate oxide layer;
- a plurality of gate electrodes of the plurality of pixel transistors of the pixel disposed over the gate oxide layer;
- and
- a shallow trench isolation (STI) structure disposed adjacent to the photodiode, the shallow trench isolation structure having sidewall surfaces and a bottom surface that are at least partially disposed underneath the gate oxide layer, wherein the sidewall surfaces and the bottom surface are implanted with nitrogen, wherein the shallow trench isolation extends to a depth that is below the pinning layer, and wherein the shallow trench isolation separates the gate electrodes from the photodiodes,
- wherein the semiconductor material-gate oxide proximate interface is devoid of implanted nitrogen in channel regions of the plurality of pixel transistors.
4 more elements
An imaging system, comprising:
- an array of pixel cells, wherein each one of the pixel cells comprises:
- a photodiode, a floating diffusion, a plurality of doped regions of a plurality of pixel transistors disposed in a layer of semiconductor material;
- a gate oxide layer disposed over the layer of semiconductor material;
- a pinning layer disposed at least partially under the gate oxide layer;
- a plurality of gate electrodes of the plurality of pixel transistors of the pixel disposed over the gate oxide layer;
- wherein the pixel cell comprises a nitrogen-implanted region at a semiconductor material-gate oxide proximate interface at a region above the photodiode, and
- wherein the pixel cell is devoid of implanted nitrogen in channel regions of the plurality of pixel transistors;
- and
- a shallow trench isolation (STI) structure disposed adjacent to the photodiode, the shallow trench isolation structure having sidewall surfaces and a bottom surface that are at least partially disposed underneath the gate oxide layer, wherein the sidewall surfaces and the bottom surface are implanted with nitrogen, wherein the shallow trench isolation extends to a depth that is below the pinning layer, and wherein the shallow trench isolation separates the gate electrodes from the photodiodes;
- a control circuitry coupled to the array of pixel cells to control operation of the array of pixel cells;
- and
- a readout circuitry coupled to the array of pixel cells to read out image data from the array of pixel cells.
9 more elements
Dependencies are inferred from the claim text.