Multi-path packet descriptor delivery scheme

A method comprising:

• associating a tag with a packet;
• storing tags as a group into a memory;
• and
• using a tag delivery path to provide a tag to a buffer associated with an egress port, wherein the tag delivery path is to provide lower latency tag access to the egress port than that of the memory and wherein the tag delivery path provides tag delivery independent of accesses to the memory.

A system comprising:

• a memory and
• a switch comprising:
• at least one ingress port;
• at least one egress port;
• circuitry to provide a path for tag delivery;
• and
• at least one processor configured to:
• associate a tag with a received packet;
• store tags as a group into the memory;
• and
• use the circuitry to provide the tag to a buffer associated with an egress port, wherein the circuitry is to provide lower latency tag access to the egress port than that of the memory and wherein the circuitry to provide tag delivery independent of access to the memory.