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US 11,700,005 B2Granted
Phase locked loop generating adaptive driving voltage and related operating method
AssigneeSamsung Electronics Co., Ltd.
InventorsKangyeop Choo, Insung Kim, Wooseok Kim, Taeik Kim, Sunghyuck Lee, Chanyoung Jeong
Life of this patent
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Abstract
A phased locked loop includes; a load circuit that generates an output signal in response to a driving voltage, a frequency calibration circuit that generates a calibration signal in response to an output frequency of the output signal and a target frequency, and a regulator that generates the driving voltage in response to the calibration signal.
Claims20
A phase locked loop (PLL) circuit, comprising:
- a load circuit that generates an output signal in response to a driving voltage;
- a frequency calibration circuit that generates a calibration signal in response to an output frequency of the output signal and a target frequency;
- and
- a regulator that generates the driving voltage in response to the calibration signal.
1 more element
A method of operating a phased locked loop (PLL) circuit, the method comprising:
- generating a driving voltage in a regular in response to a calibration signal;
- generating an output signal having an output frequency in response to the driving voltage;
- and
- generating the calibration signal by comparing the output frequency and a target frequency.
1 more element
A phase locked loop (PLL) circuit, comprising:
- a load circuit driven by a driving voltage and generating an output signal having an output frequency;
- and
- a regulator that generates the driving voltage, wherein a level of the driving voltage varies with a calibration signal, and the calibration signal is generated by comparing the output frequency with a target frequency,
- wherein the regulator comprises:
- a first resistor having a first resistance that varies with the calibration signal;
- a second resistor having a second resistance;
- a comparator that compares a bandgap reference voltage with a feedback voltage defined according to a ratio of the first resistance and the second resistance to generate a comparison result;
- and
- a transistor activated in response to the comparison result.
6 more elements
Dependencies are inferred from the claim text.