Semiconductor device with gate dielectric formed using selective deposition

A semiconductor device comprising:

• a channel region over a substrate;
• source and drain regions respectively on opposite sides of the channel region;
• a metal gate structure over the channel region;
• and
• a gate dielectric layer under the metal gate structure, wherein in a cross-sectional view along a plane containing cross-sections of the source and drain regions, the metal gate structure wraps around three sides of the gate dielectric layer.

A semiconductor device comprising:

• a channel region over a substrate;
• source and drain regions respectively on opposite sides of the channel region;
• a metal gate structure over the channel region;
• first and second gate spacers on opposite sidewalls of the metal gate structure;
• and
• a gate dielectric layer under the metal gate structure, wherein in a cross-sectional view along a plane containing cross-sections of the source and drain regions, the gate dielectric layer resembles a rectangular pattern, the rectangular pattern having a first side facing the first gate spacer but spaced apart from the first gate spacer, and a second side facing the second gate spacer but spaced apart from the second gate spacer.