Semiconductor device

A method of manufacturing a semiconductor device, the method comprising:

• forming an active structure including an active pattern protruding from a substrate and a semiconductor structure on the active pattern, the semiconductor structure comprising first layers and second layers stacked alternately on each other on the active pattern, and the semiconductor structure having edge portions exposed on a separation region of the substrate which is defined by a device isolation layer disposed in the substrate;
• forming a blocking layer covering the edge portions of the semiconductor structure on the separation region;
• forming sacrificial gate structures on the active structure and the blocking layer;
• forming recess regions by removing the first layers and the second layers exposed between the sacrificial gate structures;
• forming source/drain regions on the recess regions;
• forming gap regions by removing the sacrificial gate structures and the first layers;
• and
• forming gate structures by depositing a gate dielectric layer and a gate electrode in the gap regions.

A method of manufacturing a semiconductor device, the method comprising:

• forming first layers and second layers by alternately stacking the first layers and the second layers on an active pattern protruding from a substrate;
• forming an active structure extending in a direction parallel to an upper surface of the substrate by removing a portion of the substrate and a stacked structure of the first layers and the second layers;
• forming a device isolation layer covering a portion of side surfaces of the active structure;
• forming a mask layer covering the active structure and exposing at least one end portion of the active structure;
• forming a blocking layer covering the at least one end portion of the active structure and the device isolation layer;
• removing the mask layer after the forming of the blocking layer;
• forming sacrificial gate structures on the active structure and the blocking layer;
• forming recess regions by removing the first layers and the second layers exposed between the sacrificial gate structures;
• forming source/drain regions on the recess regions;
• forming gap regions by removing the sacrificial gate structures and the first layers;
• and
• forming gate structures by depositing a gate dielectric layer and a gate electrode in the gap regions.