Integrated circuit device including metal-oxide semiconductor transistors
AssigneeSamsung Electronics Co., Ltd.
InventorsJinhyeok Song, Mingeun Song
Life of this patent
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Abstract
An integrated circuit device including an active region; an active cutting region at a side of the active region in a first direction; a fin active pattern extending on the active region in the first direction, the fin active pattern including a source region and a drain region; a gate pattern extending across the active region and the fin active pattern in a second direction perpendicular to the first direction, the gate pattern not being in the active cutting region; and an isolated gate contact region in contact with the gate pattern outside of the active region.
Claims18
An integrated circuit device, comprising:
- an active region;
- an active cutting region at a side of the active region in a first direction, the active cutting region separating the active region into separate parts;
- a fin active pattern extending on the active region in the first direction, the fin active pattern including a source region and a drain region;
- a plurality of gate patterns spaced apart from each other in the first direction, the plurality of gate patterns extending across the active region and the fin active pattern in a second direction perpendicular to the first direction, the plurality of gate patterns not being in the active cutting region;
- and
- a conductive isolated gate contact region in contact with the plurality of gate patterns outside of the active region, the conductive isolated gate contact region electrically connecting two gate patterns of the plurality of gate patterns to each other.
An integrated circuit device, comprising:
- an active region;
- a fin active pattern extending on the active region in a first direction, the fin active pattern including a source region and a drain region;
- a gate pattern extending across the active region and the fin active pattern in a second direction perpendicular to the first direction;
- a gate cutting region located around the active region and the fin active pattern such that the gate cutting region is spaced apart from the gate pattern on one side of the gate pattern in the first direction;
- and
- an insulating first combined gate cutting region and an insulating second combined gate cutting region respectively located on opposite sides of the gate pattern in the second direction.
An integrated circuit device, comprising a plurality of unit metal-oxide semiconductor (MOS) transistors arranged in an array form apart from each other in a first direction and a second direction perpendicular to the first direction,
- wherein each of the unit MOS transistors includes:
- an active region;
- a plurality of fin active patterns extending on the active region in the first direction and spaced apart from each other in the second direction, each fin active pattern including a source region and a drain region;
- active cutting regions on opposite sides of the active region in the first direction;
- a plurality of gate patterns extending across the active region and the plurality of fin active patterns in the second direction, the plurality of gate patterns being spaced apart from each other in the first direction;
- gate cutting regions around the active region and the plurality of fin active patterns, the gate cutting regions being spaced apart from the plurality of gate patterns on opposite sides of the plurality of gate patterns in the first direction;
- and
- conductive isolated gate contact regions in contact with the plurality of gate patterns outside the active region, the conductive isolated gate contact regions being on opposite sides of the active region in the second direction and electrically connecting two gate patterns of the plurality of gate patterns to each other.
Dependencies are inferred from the claim text.