Multi-chip module having a stacked logic chip and memory stack

A computing system, comprising:

• a networking interface;
• non volatile mass storage;
• and
• a multi-chip module comprising a) and b) below:
• a) a stack of semiconductor chips, the stack of semiconductor chips comprising a logic chip that is vertically stacked with a memory stack, wherein, the logic chip comprises at least one of a GPU and CPU, the stack of semiconductor chips comprising a first semiconductor chip at a first end of the stack of semiconductor chips and a second semiconductor chip at a second end of the stack of semiconductor chips;
• and
• b) a semiconductor chip substrate, the stack of semiconductor chips mounted on the semiconductor chip substrate at a first face of the first semiconductor chip, at least one other logic chip mounted on the semiconductor chip substrate, the at least one other logic chip not vertically stacked with the stack of semiconductor chips, the semiconductor chip substrate comprising wiring to interconnect the stack of semiconductor chips to the at least one other logic chip, wherein, electrical power is to be received at a second face of the second semiconductor chip that faces a direction opposite that of the first face of the first semiconductor chip.

A method, comprising:

• stacking multiple memory chip wafers and a logic chip wafer;
• dicing the stacked memory chip wafers and logic chip wafer to form a logic chip that is vertically stacked with a memory chip stack;
• mounting the stacked logic chip and memory chip stack on a semiconductor chip substrate;
• mounting at least one other logic chip to the semiconductor chip substrate such that the at least one other logic chip is not vertically stacked with the stacked logic chip and memory chip stack;
• and,
• connecting a power connection to a first end of the stacked logic chip and memory chip stack that is opposite a second end of the stacked logic chip and memory chip stack where the stacked logic chip and memory chip stack are mounted to the semiconductor chip substrate.