Conductive member cavities
AssigneeTexas Instruments Incorporated
InventorsRafael Jose Lizares Guevara, Jovenic Romero Esquejo, Arvin Cedric Quiambao Mallari
Life of this patent
Estimating the term…
Abstract
In some examples, a quad flat no lead (QFN) semiconductor package comprises a flip chip semiconductor die having a surface and circuitry formed in the surface; and a conductive pillar coupled to the semiconductor die surface. The conductive pillar has a distal end relative to the semiconductor die, the distal end having a cavity including a cavity floor and one or more cavity walls circumscribing the cavity floor. The one or more cavity walls are configured to contain solder.
Claims26
A quad flat no lead (QFN) semiconductor package, comprising:
- a semiconductor die having a surface;
- and
- a conductive pillar coupled to the surface of the semiconductor die, the conductive pillar having a distal end relative to the semiconductor die, the distal end having a cavity including a cavity floor that is substantially flat and a cavity wall circumscribing the cavity floor, the cavity including solder.
A semiconductor package, comprising:
- a semiconductor die having a device side;
- a conductive pillar coupled to the device side and having a distal end relative to the semiconductor die, the distal end including a cavity having a cavity floor and a cavity wall, the cavity floor being substantially flat, the cavity wall having a cavity wall surface facing a same direction as the cavity floor;
- and
- a solder member filling the cavity and abutting the cavity wall and the cavity wall surface.
A quad flat no lead (QFN) semiconductor package, comprising:
- a semiconductor die;
- a first conductive pillar coupled to a device side of the semiconductor die and having a first distal end relative to the semiconductor die, the first distal end having a first cavity with a substantially flat first cavity floor and a first volume, the first cavity containing a first solder member;
- and
- a second conductive pillar coupled to the device side of the semiconductor die and having a second distal end relative to the semiconductor die, the second distal end having a second cavity with a substantially flat second cavity floor and a second volume, the second cavity containing a second solder member,
- wherein the first volume, the second volume, and a distance between the first and second conductive pillars are together configured to prevent the first and second solder members from contacting each other.
A method, comprising:
- forming a conductive pillar on a polyimide layer and a redistribution layer;
- forming a cavity in the conductive pillar, the cavity in a surface of the conductive pillar opposite the polyimide layer, wherein the cavity includes a cavity floor that is substantially flat;
- depositing a solder ball in the cavity;
- and
- performing a reflow process on the solder ball.
A method, comprising:
- forming a conductive pillar on a polyimide layer and a redistribution layer;
- forming one or more cavity walls on a surface of the conductive pillar opposite the polyimide layer to form a cavity;
- depositing a solder ball in the cavity;
- and
- performing a reflow process on the solder ball, wherein a floor of the cavity meets the one or more cavity walls at an approximately 90 degree angle.
Dependencies are inferred from the claim text.