Semiconductor package and method of manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsJun-young Oh, Hyun-ki Kim, Sang-soo Kim, Seung-hwan Kim, Yong-kwan Lee
Life of this patent
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Abstract
A semiconductor package includes a package substrate, at least one semiconductor chip mounted on the package substrate, and a molding member that surrounds the at least one semiconductor chip. The molding member includes fillers. Each of the fillers includes a core and a coating layer that surrounds the core. The core includes a non-electromagnetic material and the coating layer includes an electromagnetic material. The molding member includes regions respectively have different distributions of the fillers.
Claims15
A method of manufacturing a semiconductor package, the method comprising:
- mounting at least one semiconductor chip on top of a package substrate;
- coating a molding material including fillers including an electromagnetic material on the package substrate to surround the at least one semiconductor chip,
- moving the fillers in a certain direction in the molding material by applying an electric field or a magnetic field to the molding material;
- and
- forming a molding member to surround the at least one semiconductor chip by curing the molding material, wherein
- the molding member covers a bottom surface, a side surface, and top surfaces of the at least one semiconductor chip, wherein
- the mounting the semiconductor chip includes mounting the semiconductor chip on the package substrate using solder bumps and the moving the fillers includes applying an electric field or a magnetic field such that the fillers are moved to be placed around each of the solder bumps and placed in a relatively high distribution in a region between the semiconductor chip and the package substrate in the molding material, or
- the moving the fillers includes applying an electric field or a magnetic field such that the fillers are spaced apart from the semiconductor chip and placed in a relatively high distribution in the molding material at a peripheral region of the semiconductor chip, or
- the moving the fillers includes applying an electric field or a magnetic field such that the fillers are spaced apart from the semiconductor chip and placed in a relatively high distribution in an upper region of the molding material.
A method of manufacturing a semiconductor package, the method comprising:
- mounting at least one semiconductor chip on a package substrate;
- coating a molding material including fillers including an electromagnetic material on the package substrate to surround the at least one semiconductor chip,
- moving the fillers in a certain direction in the molding material by applying an electric field or a magnetic field to the molding material;
- and
- forming a molding member by curing the molding material, wherein
- in the moving of the fillers, the electric field or the magnetic field is applied to the fillers such that the fillers are moved in a direction in which warpage of the package substrate is alleviated, and
- in the forming the molding member, coefficients of thermal expansion in different regions of the molding member vary according to a distribution of the fillers.
A method of manufacturing a semiconductor package, the method comprising:
- mounting at least one semiconductor chip on a package substrate;
- coating a molding material including fillers including an electromagnetic material on the package substrate to surround the at least one semiconductor chip,
- moving the fillers in a certain direction in the molding material by applying an electric field or a magnetic field to the molding material;
- and
- forming a molding member by curing the molding material, wherein
- the fillers each include a core and a coating layer that surrounds the core,
- the core includes a non-electromagnetic material, and
- the coating layer includes an electromagnetic material.
Dependencies are inferred from the claim text.