Semiconductor processing chambers for deposition and etch

A semiconductor processing system comprising:

• a chamber body;
• a substrate support configured to support a semiconductor substrate, wherein the substrate support comprises
• a pedestal shaft,
• a platen, wherein the platen defines a fluid channel across a first surface of the platen,
• a platen insulator positioned between the platen and the pedestal shaft,
• a conductive puck coupled with the first surface of the platen and configured to contact a substrate supported on the semiconductor substrate,
• a conductive shield extending along a backside of the platen insulator and coupled between a portion of the platen insulator and the pedestal shaft,
• an RF rod extending through the pedestal shaft, the RF rod electrically coupled with the platen,
• a rod insulator extending about the RF rod along a length of the RF rod,
• wherein the pedestal shaft and the platen insulator define a vertical portion of a purge path, the vertical portion of the purge path being spaced apart laterally from the rod insulator, the purge path having a lateral portion extending from the vertical portion to the rod insulator, and wherein the purge path has a third portion that extends downward along the rod insulator,
• a faceplate, wherein the chamber body, the substrate support, and the faceplate define a processing region;
• a high-frequency plasma source coupled with the faceplate;
• and
• a low-frequency plasma source coupled with the substrate support.