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US 11,699,501 B2Granted
Semiconductor memory device and partial rescue method thereof
AssigneeSK hynix Inc.
InventorSung Lae Oh
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device includes a plurality of planes defined in a plurality of chip regions; and a rescue circuit configured to disable a failed plane and enable a normal plane from among the plurality of planes, wherein the semiconductor memory device operates with only normal planes that are enabled.
Claims9
A layout of a semiconductor memory device comprising:
- a plurality of chip regions each including a plurality of planes arranged in a first direction;
- a main pad region extending in a second direction perpendicular to the first direction and including a plurality of main pads arranged in the second direction;
- a plurality of sub pad regions, each extending in the second direction and including a plurality of sub pads arranged in the second direction;
- wherein each of the plurality of planes corresponds to one of the plurality of main pads;
- wherein each of the plurality of planes is directly connected to at least one of the plurality of sub pads, which is connected to the corresponding one of the main pads through a redistribution line;
- and
- wherein a width of the main pad region in the first direction is greater than a width of the sub pad region in the first direction.
4 more elements
Dependencies are inferred from the claim text.