Nonvolatile memory apparatus for generating read reference and an operating method of the nonvolatile memory apparatus
AssigneeSK hynix Inc.
InventorMoo Hui Park
Life of this patent
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Abstract
A nonvolatile memory apparatus may include a control circuit, a sense amplifier, and a reference generator. The control circuit may apply a read voltage across a target memory cell through a selected global bit line and a selected global word line. The sense amplifier may generate an output signal by comparing voltage levels of the selected global word line and a reference line. The reference generator may change the voltage level of the reference line by charging and discharging a capacitor that is coupled to the reference line.
Claims22
A nonvolatile memory apparatus comprising:
- a control circuit configured to apply a read voltage across a target memory cell by applying a first read boundary voltage to a selected global bit line and by applying a second read boundary voltage to a selected global word line;
- a sense amplifier configured to generate an output signal by comparing voltage levels of the selected global word line and an unselected global word line that is not coupled to the target memory cell;
- and
- a reference generator configured to change the voltage level of the unselected global word line by charging and discharging a capacitor that is coupled to the unselected global word line.
An operating method of a nonvolatile memory apparatus that accesses a target memory cell, coupled between a selected bit line and a selected word line, the operating method comprising:
- applying a first read boundary voltage to the selected bit line, applying a second read boundary voltage to the selected word line, and precharging a reference line to the second read boundary voltage;
- raising the voltage level of the reference line by providing a first low voltage to a capacitor that is coupled to the reference line;
- generating an output signal by comparing the voltage level of the selected word line, which is changed according to data that is stored in the target memory cell, to the voltage level of the reference line;
- and
- providing a second low voltage to the capacitor that is coupled to the reference line.
A nonvolatile memory apparatus comprising:
- a first global word line coupled to a first memory cell in a first tile of a memory cell array;
- a second global word line coupled to a second memory cell in a second tile of the memory cell array;
- a sense amplifier comprising a first input terminal and a second input terminal, the sense amplifier configured to generate an output signal by comparing the voltage levels of the first and second input terminals;
- a reference generator configured to change the voltage level of the second input terminal by charging and discharging a capacitor that is coupled to the second input terminal;
- and
- a global switching circuit configured to couple one of the first and second global word lines to the first input terminal and to couple the other of the first and second global word lines to the second input terminal based on a tile select signal to select one of the first and second tiles.
A nonvolatile memory apparatus comprising:
- a control circuit configured to apply a read voltage across a target memory cell through a selected global bit line and a selected global word line;
- a sense amplifier configured to generate an output signal by comparing voltage levels of the selected global word line and a reference line;
- a capacitor with one end coupled to the reference line;
- and
- a boosting control circuit configured to provide the other end of the capacitor with one of a first low voltage and a second low voltage based on a boosting control signal.
Dependencies are inferred from the claim text.