Assigning identifiers to processing units in a column to repair a defective processing unit in the column

A method comprising:

• transporting data via a plurality of sets of wires of an exchange fabric, each of the sets of wires being operable to transport data output by one of a plurality of processing circuits with which it is associated, wherein each processing circuit comprises multiple tiles;
• receiving at repair logic for a multiplexer associated with a first of the plurality of processing circuits, a first repair code identifying a defective one of the processing circuits;
• receiving at the repair logic, an identifier of a second of the plurality of processing circuits;
• in response to a comparison of the first repair code and the identifier of the second of the processing circuits, causing the multiplexer to connect the first of the processing circuits to one of the sets of wires that is associated with a third of the processing circuits that is different to the second of the processing circuits, such that a data packet output by the third of the processing circuits is received at the first of the processing circuits, and
• causing delay circuitry associated with each of the sets of wires operable to transport data output by its associated one of the processing circuits to be bypassed to compensate for timing in transporting data output by the third of the processing circuits to the first of the processing circuits.