Apparatus and method for writing data in a memory
AssigneeSamsung Electronics Co., Ltd.
InventorsJaeshin Lee, Eunhye Oh, Jaechul Park
Life of this patent
Estimating the term…
Abstract
A device for writing data to a memory, the device including: a first write buffer having a first data width that matches a width of write data included in a write request and wherein the first write buffer is configured to store the write data as first data; a second write buffer having a second data width that matches a data width of the memory and is greater than the first data width; and a controller configured to, based on a write address included in the write request and an address of the second data stored in the second write buffer, write the first data stored in the first write buffer to the second write buffer and write the second data stored in the second write buffer to the memory.
Claims16
A method of controlling a memory, the method comprising:
- receiving a write request including a write command, write data, and a write address;
- writing, in response to the write command, the write data to a first write buffer having a first data width that matches a width of the write data;
- writing first data stored in the first write buffer to a second write buffer based on the write address and an address of second data stored in the second write buffer, the second write buffer having a second data width that matches a data width of the memory and is, greater than the first data width;
- writing the second data to the memory based on the write address and the address of the and data stored in the second write buffer,
- receiving a read request including a read command and a read address;
- reading third data from the memory and writing the third data to a read buffer having the second data width in response to the read command;
- and
- outputting read data having the first data width and stored in the read buffer,
- wherein the writing of the first data to the second write buffer comprises:
- updating the third data by writing the first data to the read buffer when a region of the memory corresponding to the write address is included in a region of the memory corresponding to an address of the third data;
- and
- writing, to the second write buffer, the updated third data from the read buffer as the second data.
A device for controlling a memory, the device comprising:
- a first write buffer having a first data width that matches a width of write data included in a write request and wherein the first write buffer is configured to store the write data;
- a second write buffer having a second data width that matches a data width of the memory and is greater than the first data width;
- a controller configured to, based on a write address included in the write request and an address of the second data stored in the second write buffer, write first data stored in the first write buffer to the second write buffer and write the second data stored in the second write buffer to the memory;
- and
- a read buffer configured to output read data having the first data width, the read buffer having the second data width,
- wherein the controller is further configured to read third data from the memory, write the third data to the read buffer in response to a read command included in a read request and select the read data from the third data based on a read address included in the read request,
- wherein the controller is further configured to update the third data by writing the first data to the read buffer without writing the first data to the second write buffer when a region of the memory corresponding to the write address is included in a region of the memory corresponding to an address of the third data, and
- wherein the controller is further configured to write the updated third data from the read buffer to the second write buffer.
A device for controlling a memory, the device comprising:
- a first write buffer having a first data width that matches a width of write data included in a write request and wherein the first write buffer is configured to store the write data;
- a second write buffer having a second data width that matches a data width of the memory and is greater than the first data width;
- a controller configured to update a portion of second data with first data stored in the first write buffer when a region of the memory corresponding to a write address included in the write request is included in a region of the memory corresponding to an address of the second data stored in the second write buffer so that a hit occurs in the second write buffer, and to write the second data to the memory based on an update state of the second data when the region of the memory corresponding to the write address included in the write request is not included in the region of the memory corresponding to the address of the second data stored in the second write buffer so that a miss occurs in the second write buffer;
- and
- a read buffer configured to output read data having the first data width, the read buffer having the second data width,
- wherein the controller is further configured to read third data from the memory, write the third data to the read buffer in response to a read command included in a read request and update the third data by writing the first data to the read buffer without writing the first data to the sec write buffer when the region of the memory corresponding to the write address is included in a region of the memory corresponding to an address of the third data, and
- wherein the controller is further configured to write the updated third data from the read buffer to the second write buffer.
Dependencies are inferred from the claim text.