Integrated circuit chip with cores asymmetrically oriented with respect to each other
AssigneeTexas Instruments Incorporated
InventorsJasbir Singh Nayyar, Shashank Srinivasa Nuthakki, Rahul Gulati, Arun Shrimali
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Abstract
An integrated circuit (IC) chip can include a given core at a position in the IC chip that defines a given orientation, wherein the given core is designed to perform a particular function. The IC chip can include another core designed to perform the particular function. The other core can be flipped and rotated by 180 degrees relative to the given core such that the other core is asymmetrically oriented with respect to the given core. The IC chip can also include a compare unit configured to compare outputs of the given core and the other core to detect a fault in the IC chip.
Claims21
An integrated circuit (IC) comprising:
- a first core having an output and a first orientation on a substrate;
- a second core having an output and a second orientation on the substrate, wherein the second core is a replica of the first core and wherein the second orientation is different than the first orientation;
- and
- a compare unit having a first input and a second input on the substrate, the first input coupled to the output of the first core and the second input coupled to the output of the second core, wherein the IC is formed with a microfabrication technique on a scale of 45 nanometers (nm) or smaller.
A method comprising:
- receiving a stress source at an integrated circuit (IC) comprising a first core having an output and a first orientation on a substrate, a second core having an output and a second orientation on the substrate, and a compare unit having a first input and a second input on the substrate, the first input coupled to the output of the first core and the second input coupled to the output of the second core, wherein the second core is a replica of the first core, and wherein the second orientation is different than the first orientation;
- and
- in response to receiving the stress source, detecting a malfunction of the first or second cores using the compare unit.
Dependencies are inferred from the claim text.