Selective sampling of a data unit during a program erase cycle based on error rate change patterns

A system comprising:

• a memory device;
• and
• a processing device, operatively coupled with the memory device, to perform operations comprising:
• determining a first error rate associated a first set of pages of a plurality of pages of a data unit of a memory device, and a second error rate associated with a second set of pages of the plurality of pages of the data unit;
• determining a first pattern of error rate change for the data unit based on the first error rate and the second error rate;
• and
• responsive to determining that the first pattern of error rate change corresponds to a predetermined second pattern of error rate change, performing an action pertaining to defect remediation with respect to the data unit.

A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:

• determining a first error rate associated a first set of pages of a plurality of pages of a data unit of a memory device, and a second error rate associated with a second set of pages of the plurality of pages of the data unit;
• determining a first pattern of error rate change for the data unit based on the first error rate and the second error rate;
• and
• responsive to determining that the first pattern of error rate change corresponds to a predetermined second pattern of error rate change, performing an action pertaining to defect remediation with respect to the data unit.