Accelerated mathematical engine
AssigneeTesla, Inc.
InventorsPeter Joseph Bannon, Kevin Altair Hurd, Emil Talpes
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Abstract
Various embodiments of the disclosure relate to an accelerated mathematical engine. In certain embodiments, the accelerated mathematical engine is applied to image processing such that convolution of an image is accelerated by using a two-dimensional matrix processor comprising sub-circuits that include an ALU, output register and shadow register. This architecture supports a clocked, two-dimensional architecture in which image data and weights are multiplied in a synchronized manner to allow a large number of mathematical operations to be performed in parallel.
Claims20
A matrix processor comprising:
- a first input circuit configured to receive sensor data, wherein the sensor data is organized into individual first vectors, wherein an initial first vector is provided along a first direction of the matrix processor;
- a second input circuit configured to receive one or more filters of a plurality of filters, wherein the one or more filters are organized into individual second vectors, wherein an initial second vector is provided along a second direction of the matrix processor;
- and
- a plurality of sub-circuits arranged as a matrix along the first direction and second direction, wherein the sub-circuits are configured to convolve the sensor data and filters, wherein to convolve the sensor data and filters, the sub-circuits are configured to:
- determine first partial dot products based on respective values included in the initial first vector and the initial second vector, wherein the first partial dot products are stored in the sub-circuits,
- determine subsequent partial dot products based on respective values included in subsequent first vectors and subsequent second vectors,
- wherein the sub-circuits are configured to add the first partial dot products stored in the accumulators with the subsequent partial dot products,
- and wherein each sub-circuit stores a respective output pixel associated with the convolution.
A system comprising:
- a first logic circuit configured to format sensor data into individual first vectors, wherein an initial first vector is provided along a first direction of a matrix processor;
- a second logic circuit configured to format one or more filters into individual second vectors, wherein an initial second vector is provided along a second direction of the matrix processor;
- and
- the matrix processor comprising a plurality of sub-circuits arranged as a matrix along the first direction and second direction, wherein the sub-circuits are configured to convolve the sensor data and filters,
- wherein to convolve the sensor data and filters, the sub-circuits are configured to accumulate partial dot products associated with individual first vectors and individual second vectors, wherein each sub-circuit stores a respective output pixel associated with the convolution.
A method implemented by a matrix processor, the method comprising:
- receiving, from a first logic circuit, sensor data, wherein the sensor data is organized into individual first vectors, wherein an initial first vector is provided along a first direction of the matrix processor;
- receiving, from a second logic circuit, one or more filters of a plurality of filters, wherein the one or more filters are organized into individual second vectors, wherein an initial second vector is provided along a second direction of the matrix processor;
- using a plurality of sub-circuits of the matrix processor to convolve the sensor data and filters, wherein the sub-circuits are arranged as a matrix along the first direction and second direction, and wherein to convolve the sensor data and filters the sub-circuits:
- determine first partial dot products based on respective values included in the initial first vector and the initial second vector, wherein the first partial dot products are stored in the sub-circuits,
- determine subsequent partial dot products based on respective values included in subsequent first vectors and subsequent second vectors,
- wherein the sub-circuits are configured to add the first partial dot products stored in the accumulators with the subsequent partial dot products,
- and wherein each sub-circuit stores a respective output pixel associated with the convolution.
Dependencies are inferred from the claim text.