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US 11,696,450 B1Granted
Common mode compensation for multi-element non-linear polar material based gain memory bit-cell
AssigneeKepler Computing Inc.
InventorsRajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Amrita Mathuriya, Sasikanth Manipatruni
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Abstract
To compensate switching of a dielectric component of a non-linear polar material based capacitor, an explicit dielectric capacitor is added to a memory bit-cell and controlled by a signal opposite to the signal driven on a plate-line.
Claims20
An apparatus comprising:
- a node;
- a first capacitor comprising non-linear polar material, the first capacitor having a first terminal coupled to the node and a second terminal coupled to a first plate-line;
- a second capacitor comprising non-linear polar material, the second capacitor having a first terminal coupled to the node and a second terminal coupled to a second plate-line;
- a first transistor coupled to the node and a bit-line, wherein the first transistor is controllable by a word-line;
- a second transistor coupled to the node and a sense-line;
- and
- a third capacitor coupled to the node and a third plate-line, wherein the third capacitor comprises a linear dielectric.
4 more elements
An apparatus comprising:
- an array of bit-cells organized in rows and columns, wherein an individual bit-cell includes:
- a node;
- a first capacitor comprising non-linear polar material, the first capacitor having a first terminal coupled to the node and a second terminal coupled to a first plate-line;
- a second capacitor comprising non-linear polar material, the second capacitor having a first terminal coupled to the node and a second terminal coupled to a second plate-line;
- a first transistor coupled to the node and a bit-line, wherein the first transistor is controllable by a word-line;
- a second transistor coupled to the node and a sense-line;
- and
- a third capacitor coupled to the node and a third plate-line, wherein the third capacitor comprises a linear dielectric;
- and
- a driver circuitry to drive a first voltage on the first plate-line and to drive a second voltage on the third plate-line, wherein the first voltage is an inverse of the second voltage.
7 more elements
A system comprising:
- a processor circuitry to execute one or more instructions;
- a memory coupled to the processor circuitry;
- and
- a communication interface to allow the processor circuitry to communicate with another device, wherein the memory includes a bit-cell which comprises:
- a node;
- a first capacitor comprising non-linear polar material, the first capacitor having a first terminal coupled to the node and a second terminal coupled to a first plate-line;
- a second capacitor comprising non-linear polar material, the second capacitor having a first terminal coupled to the node and a second terminal coupled to a second plate-line;
- a first transistor coupled to the node and a bit-line, wherein the first transistor is controllable by a word-line;
- a second transistor coupled to the node and a sense-line;
- and
- a third capacitor coupled to the node and a third plate-line, wherein the third capacitor comprises a linear dielectric.
8 more elements
Dependencies are inferred from the claim text.