Methods of forming microelectronic devices, and related memory devices, and electronic systems

A memory device, comprising:

• a stack structure comprising tiers each comprising at least one conductive structure and at least one insulating structure vertically adjacent the at least one conductive structure;
• dielectric-filled trenches partially vertically extending through the stack structure and each comprising:
• a lower portion;
• and
• an upper portion having one or more greater horizontal widths than the lower portion;
• a staircase structure having steps comprising edges of the tiers of the stack structure;
• a source tier underlying the stack structure and comprising:
• a source plate;
• and
• discrete conductive structures separated from one another and the source plate;
• contact structures vertically extending through the stack structure and contacting the discrete conductive structures of the source tier;
• access line contact structures on the steps of the staircase structure and horizontally alternating with some of the contact structures;
• data lines overlying the stack structure;
• an array of vertically extending strings of memory cells extending through the stack structure and electrically connected to the source plate and the data lines;
• access lines electrically connected to the access line contact structures;
• and
• a control device comprising CMOS circuitry vertically underlying the source tier and within horizontal boundaries of the array of vertically extending strings of memory cells, the control device electrically coupled to the source plate, the data lines, and the access lines.

An electronic system, comprising:

• an input device;
• an output device;
• a processor device operably coupled to the input device and the output device;
• and
• a memory device operably coupled to the processor device and comprising a microelectronic device structure comprising:
• a stack structure comprising tiers each comprising a conductive structure and a dielectric structure vertically neighboring the conductive structure;
• dielectric-filled trenches vertically extending completely through the stack structure;
• additional dielectric-filled trenches horizontally neighboring the dielectric-filled trenches and vertically extending partially through the stack structure, at least one of the additional dielectric-filled trenches having non-planar horizontal boundaries;
• a source tier vertically below the stack structure and comprising:
• a source structure;
• and
• discrete conductive structures electrically isolated from one another and the source structure;
• and
• conductive contacts vertically extending through the stack structure to the discrete conductive structures of the source tier.