Vertical memory devices and methods of manufacturing the same

A vertical memory device, comprising:

• gate electrodes on a substrate, the gate electrodes being stacked in a staircase shape in a first direction substantially perpendicular to an upper surface of the substrate, the staircase shape including steps of which extension lengths in a second direction substantially parallel to the upper surface gradually decrease from a lowermost level toward an uppermost level, at least one of the gate electrodes having a pad at an end portion in the second direction, and the pad of the at least one of the gate electrodes having a thickness greater than thicknesses of other portions thereof, the gate electrodes including a first gate electrode and second gate electrodes under the first gate electrode;
• a channel extending through the gate electrodes in the first direction;
• and
• a conductive contact plug extending through each of the first gate electrode and the second gate electrodes in the first direction, the conductive contact plug contacting the first gate electrode such that the conductive contact plug is electrically connected to the first gate electrode and is electrically insulated from the second gate electrodes under the first gate electrode.

A vertical memory device, comprising:

• gate electrodes on a substrate, the gate electrodes being stacked in a staircase shape in a first direction substantially perpendicular to an upper surface of the substrate, the staircase shape including steps of which extension lengths in a second direction substantially parallel to the upper surface gradually decrease from a lowermost level toward an uppermost level, and at least one of the gate electrodes having a pad at an end portion in the second direction;
• first insulation patterns between the gate electrodes, respectively;
• a channel extending through the gate electrodes and the first insulation patterns in the first direction;
• and
• a conductive contact plug extending through the gate electrodes and the first insulation patterns in the first direction, the conductive contact plug contacting a first gate electrode among the gate electrodes such that the conductive contact plug is electrically connected to the first gate electrode and is electrically insulated from second gate electrodes under the first gate electrode among the gate electrodes,
• wherein an upper surface of the pad of the at least one of the gate electrodes is higher than a lower surface of one of the first insulation patterns directly on the at least one of the gate electrodes.