Digital signal processor/network synchronization
AssigneeBose Corporation
InventorRemco Terwal
Life of this patent
Estimating the term…
Abstract
A system for synchronizing a local audio processing clock rate of a digital signal processor (DSP) to an audio clock rate of a network to which the DSP is connected. The system includes an adjustable clock synthesizer that is configured to establish the local audio processing clock rate of the DSP. The DSP is configured to generate events that are associated with the local audio processing clock rate of the DSP. The DSP is further configured to monitor the generated events over time and based on the monitored events cause the adjustable clock synthesizer to adjust the local audio processing clock rate of the DSP to better match the network audio clock rate.
Claims14
A system for synchronizing a local audio processing clock rate of a digital signal processor (DSP) to an audio clock rate of a network to which the DSP is connected, comprising:
- an adjustable clock synthesizer that is configured to establish the local audio processing clock rate of the DSP;
- a DSP memory that comprises an input buffer that is configured to store audio frames received over the network and an output buffer that is configured to store audio frames that have been read from the input buffer and processed by the DSP;
- wherein the DSP is configured to generate events that comprise interrupts that are generated when audio data frames are inputted or outputted from the DSP memory;
- and
- wherein the DSP is further configured to monitor the generated events over time and based on the monitored events cause the adjustable clock synthesizer to adjust the local audio processing clock rate of the DSP to better match the network audio clock rate.
A system for synchronizing a local audio processing clock rate of a digital signal processor (DSP) to an audio clock rate of a network to which the DSP is connected, comprising:
- an adjustable clock synthesizer that is configured to establish the local audio processing clock rate of the DSP;
- wherein the DSP is configured to count cycles of both a local audio processing frame clock of the DSP and an audio frame clock of the network to which the DSP is connected and based on the counted cycles cause the adjustable clock synthesizer to adjust the local audio processing clock rate of the DSP to better match the network audio clock rate;
- wherein the DSP is configured to generate an interrupt when audio data frames are inputted or outputted from a first DSP memory;
- and
- wherein the DSP is configured to count cycles of both the local audio processing frame clock of the DSP and the audio frame clock of the network to which the DSP is connected based on the generated interrupts and the state of a second DSP memory during each interrupt.
Dependencies are inferred from the claim text.