Distribution shaping method, distribution deshaping method, distribution shaping encoder, distribution shaping decoder, and transmission system
AssigneeMitsubishi Electric Corporation
InventorTsuyoshi Yoshida
Life of this patent
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Abstract
In a distribution shaping method, information compression and distribution shaping are executed at the same time. A symbol sequence of a predetermined length is allocated to an input bit sequence of a predetermined length on a one-to-one basis. In the allocation, a bit sequence smaller in entropy is allocated a symbol sequence smaller in average power.
Claims18
A distribution shaping method, comprising allocating a symbol sequence of a predetermined length to a bit sequence of a predetermined length, by allocating a symbol sequence smaller in average power out of available symbol sequences when the bit sequence includes a larger number of bits that have a first value.
A distribution deshaping method, comprising allocating a bit sequence of a predetermined length to a symbol sequence of a predetermined length, by allocating a bit sequence larger in the number of bits that have a first value out of available bit sequences when the symbol sequence is smaller in average power.
A distribution shaping encoder, comprising:
- a pre-stage circuit configured to divide, following a predetermined rule;
- a bit sequence of a predetermined length into a first bit sequence and a second bit sequence, and output the first bit sequence and the second bit sequence;
- an allocation circuit configured to allocate, to the first bit sequence, a symbol sequence smaller in average power out of available symbol sequences when the first bit sequence includes a larger number of bits that have a first value;
- a delay adjustment circuit configured to adjust a delay of the second bit sequence and a delay of the symbol sequence so that the delays are the same, and output the second bit sequence and the symbol sequence;
- and
- a post-stage circuit configured to generate a new symbol sequence by combining, following a predetermined rule, the second bit sequence and the symbol sequence that are output from the delay adjustment circuit, and output the new symbol sequence.
A distribution shaping decoder, comprising:
- a pre-stage circuit configured to divide, following a predetermined rule, a symbol sequence of a predetermined length into a first symbol sequence and a second symbol sequence, and output the first symbol sequence and the second symbol sequence;
- an allocation circuit configured to allocate, to the first symbol sequence, a bit sequence larger in the number of bits that have a first value out of available bit sequences when the first symbol sequence is smaller in average power;
- a delay adjustment circuit configured to adjust a delay of the second symbol sequence and a delay of the bit sequence so that the delays are the same, and output the second symbol sequence and the bit sequence;
- and
- a post-stage circuit configured to generate a new bit sequence by combining, following a predetermined rule, the second symbol sequence and the bit sequence that are output from the delay adjustment circuit, and output the new bit sequence.
Dependencies are inferred from the claim text.