Distortion reduction circuit
AssigneeInternational Business Machines Corporation
InventorsJarrett Betke, George Russell Zettles, IV, Timothy Lindquist, George Paulik, Timothy Clyde Buchholtz, Karl Erickson, Daniel Ramirez
Life of this patent
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Abstract
An apparatus includes a sampling circuit, a sense circuit, and a tuning circuit. The sampling circuit samples an input signal according to a sampling clock signal to produce a sampled signal. The sense circuit determines a scaling factor based on a distortion in the sampled signal caused by the sampling clock signal. The tuning circuit generates an offset signal based on the sampling clock signal and the scaling factor. The offset signal reduces the distortion in the sampled signal caused by the sampling clock signal.
Claims17
An apparatus comprising:
- a sampling circuit configured to sample an input signal according to a sampling clock signal to produce a sampled signal;
- a sense circuit configured to determine a scaling factor based on a distortion in the sampled signal caused by the sampling clock signal;
- a tuning circuit configured to generate an offset signal based on the sampling clock signal and the scaling factor;
- and
- a mixer configured to multiply the offset signal with the sampled signal to reduce the distortion in the sampled signal caused by the sampling clock signal.
A method comprising:
- sampling an input signal according to a sampling clock signal to produce a sampled signal;
- determining a scaling factor based on a distortion in the sampled signal caused by the sampling clock signal;
- generating an offset signal based on the sampling clock signal and the scaling factor;
- and
- multiplying the offset signal with the sampled signal to reduce the distortion in the sampled signal caused by the sampling clock signal.
An apparatus comprising:
- a sense circuit configured to determine a scaling factor based on a distortion in a sampled signal caused by a sampling clock signal used to generate the sampled signal;
- and
- a tuning circuit configured to generate an offset signal based on the sampling clock signal and the scaling factor;
- and
- a mixer configured to multiply the offset signal with the sampled signal to reduce the distortion in the sampled signal caused by the sampling clock signal.
Dependencies are inferred from the claim text.